The present invention relates to a process for manufacturing a resistive structure used in semiconductor integrated circuits, and, more particularly, to a process for manufacturing a resistive structure having at least one semiconductor strip above a semiconductor substrate.
Embodiments of the invention relate to a process for manufacturing a resistive structure for applications in radio-frequency and the following description is made with reference to this field of application with the only purpose of simplifying the explanation.
Passive components are often used in the manufacturing of integrated circuits, such as resistors that are formed by polysilicon strips which lay above a semiconductor substrate. The polysilicon may be in some cases be a doped polysilicon.
These resistors often can have resistivity values extending over a range of five orders of magnitude (10 ohm-1 Mohm). Resistors used in high frequency applications also require a low parasitic capacitance with respect to the substrate. Because these components typically use only one polysilicon substrate having a predetermined resistivity, their size cannot be optimized with respect to the parasitic component.
If a low conductivity material is used in resistor manufacturing, thereby obtaining high resistance values, it is necessary to manufacture a component having a minimum width but a considerable length.
Moreover, if the resistive component will be subjected to high current densities, then in order to obtain the required resistance value the resistor will have to have larger width and length measurements than if it were not subjected to the high current densities.
Prior methods of forming resistive doped polysilicon strips included successive implantation steps with different doses, using lithographic methods to protect some of the strips from some of the implantations. In particular, in those methods all of the polysilicon strips that will be used for resistive structures are doped in a first ion implantation process. This first process is carried out with a dose of dopant necessary for obtaining the resistive structures with the highest value.
Using a subsequent lithographic process, the polysilicon strips which will constitute the resistive structures with the highest value are masked, and the remaining ones will be exposed to a second implantation process. This process in conjunction with the above process allows the formation of a resistive structure with a lower value.
Using another ion implantation and photolithographic process, it is possible to obtain strips of polysilicon with three different values of resistivity. It is then possible to use the strips having a low resistivity to form the resistor at lower resistance and those at high resistivity for those at high resistance.
The portions of the passive component that are needed for the interconnection with the usual level of metalization are normally subjected to all ion implantation processes in order to minimize the contact resistance between the polysilicon and the metal.
If, in order to better control the resistivity of the polycrystalline silicon at the time of the formation of the resistors semiconductor, regions are provided on the surface of the integrated circuit which are not xe2x80x9chomologousxe2x80x9d to the species to be implanted, it may be then necessary to use a further photolithographic process that protects the surface portions. In fact, it will be necessary to xe2x80x9cmaskxe2x80x9d such regions during the first ion implantation process and during the following ones, in order to avoid a partial or total compensation of the dopant species present therein, which would negatively affect the contact resistance with respect to the metalization.
This prior solution requires different masking steps in order to form these passive components, increasing the complexity of the manufacturing process and its costs.
Embodiments of the invention use a process for manufacturing polysilicon resistors, in a single lithographic and ion implantation step, to obtain semiconductor regions of different resistivity. The process uses functional features that minimize the process steps needed for forming these resistors, without losing flexibility, and overcomes the drawbacks that limit the processes formed according to the prior art.
Used in the process is a manufacturing mask that has apertures for masking some portions of the same polysilicon strip during the implantation step. A subsequent thermal treatment uses a side diffusion of the dopant inside the semiconductor material to obtain high resistivity values with respect to resistors that are not subjected to any protection during the ion implantation.
Presented is a process for manufacturing a resistive structure that begins by covering a semiconductor strip with a mask. A number of apertures are formed in the mask until portions of the semiconductor strip are uncovered. A dopant is then implanted into these uncovered portions through the apertures, and the semiconductor is subjected to a thermal process that diffuses the dopant to obtain a variable concentration profile in the semiconductor strip.
The features and the advantages of the process according to embodiments of the invention will result from the following description of an embodiment thereof, which is reported for indicative and non limiting purposes with reference to the attached drawings.